ALUGenerator class
#include <ALUGenerator.hpp>
Contents
Base classes
- class SimpleGenerator
Constructors, destructors, conversion operators
- ALUGenerator()
- ALUGenerator(uint_fast32_t i_seed)
- ALUGenerator(const GenerationParameters& i_param)
Public functions
- auto generatorALU(int32_t i_bits, int32_t i_outbits, bool ALL, bool SUM, bool SUB, bool NSUM, bool NSUB, bool MULT, bool COM, bool AND, bool NAND, bool OR, bool NOR, bool XOR, bool XNOR, bool CNF, bool RNL, bool NUM_OP, uint32_t minLevel, uint32_t maxLevel, uint32_t minElement, uint32_t maxElement, std::map<Gates, int32_t> m, bool LeaveEmptyOut) -> GraphPtr
- generatorALU represents the generation of a combinational circuit of an ALU (Arithmetic Logic Unit).
- auto generatorALU(const GenerationParameters& i_param) -> GraphPtr
- auto generatorALU() -> GraphPtr
Function documentation
GraphPtr CG_Gen::
generatorALU represents the generation of a combinational circuit of an ALU (Arithmetic Logic Unit).
| Parameters | |
|---|---|
| i_bits | The number of bits, which specifies for what size of input values each generators should be. |
| i_outbits | The number of bits, which specifies for what size of output values each generators should be. |
| ALL | A Boolean flag indicating whether it is worth selecting all types of generation from the available ones |
| SUM | A Boolean flag indicating whether to choose summator generation with positive numbers |
| SUB | A Boolean flag indicating whether it is worth choosing to generate a subtractor with a choice of a reduced B and subtracted A |
| NSUM | A Boolean flag indicating whether to choose summator generation with negative numbers |
| NSUB | A Boolean flag indicating whether it is worth choosing to generate a subtractor with a choice of a reduced A and subtracted B |
| MULT | A Boolean flag indicating whether to choose multiplier generation |
| COM | A Boolean flag indicating whether to choose the generation of the comparator |
| AND | A Boolean flag indicating whether to choose to generate a logical operation AND |
| NAND | A Boolean flag indicating whether to choose to generate a logical operation NAND |
| OR | A Boolean flag indicating whether to choose to generate a logical operation OR |
| NOR | A Boolean flag indicating whether to choose to generate a logical operation NOR |
| XOR | A Boolean flag indicating whether to choose to generate a logical operation XOR |
| XNOR | A Boolean flag indicating whether to choose to generate a logical operation XNOR |
| CNF | A Boolean flag indicating whether it is worth choosing to generate a generator based on a Random Truth Table |
| RNL | A Boolean flag indicating whether it is worth choosing to type of generation Rand Level |
| NUM_OP | A Boolean flag indicating whether it is worth choosing to type of generation Num Operation |
| minLevel | The minimum level of complexity of the graph from generation based on Rand Level |
| maxLevel | The maximum level of complexity of the graph from generation based on Rand Level. If the value is set to 0, only the minimum level will be used. |
| minElement | The minimum number of elements (valves) at each level from generation based on Rand Level |
| maxElement | The maximum number of elements (valves) at each level from generation based on Rand Level |
| m | A dictionary containing a set of logical operations (gates) and their numbers that can be used to generate a graph from generation based on Num Operation |
| LeaveEmptyOut | A Boolean flag indicating whether to leave the output vertices empty if the number of output vertices is greater than the number of logical operations in the graph from generation based on Num Operation. If true, the remaining output vertices will remain empty, if false, they will be deleted |
| Returns | the created OrientedGraph |
It is a multi-structured graph consisting of a set of subgraphs selected by the user. The framework of the ALU generator is a multiplexer, which is a subgraph. This subgraph is connected to other subgraphs, which are almost all the declared generators above. Their generation takes place at the user's choice and the output vertices are connected to the input vertices of the multiplexer subgraph. As a result, the ALU has one output vertex from each multiplexer, which transmit the result to the output based on the signals of the control input vertices.