Circuit class
#include <Circuit.hpp>
class Circuit
Contents
Constructors, destructors, conversion operators
- Circuit(GraphPtr const i_graph, const std::vector<std::string>& i_logExpressions = {})
Public functions
- void computeHash()
- computeHash A method for calculating the hash of a combinational scheme */
- void updateCircuitParameters(GraphPtr i_graph)
- updateCircuitsParameters A method for updating the parameters of a combinational circuit
- auto graphToVerilog(const std::string& i_path, bool i_pathExists = false) -> bool
- graphToVerilog The graph To Verilog method in the Circuit class converts the combinational circuit into code in the Verilog hardware description language and writes it to a file.
- auto graphToDOT(const std::string& i_path, bool i_pathExists = false) -> bool
- graphToDOT The graph To DOT method in the Circuit class converts the combinational circuit into code in the DOT hardware description language and writes it to a file.
- auto graphToGraphML(const std::string& i_path, const CircuitArgs& args) -> bool
- saveParameters The save Parameters method in the Circuit class is designed to save circuit parameters to a file in JSON format The method saves the main parameters of the circuit, such as the name, number of inputs and outputs, maximum level, etc., in JSON format.
- auto saveParameters(GraphPtr i_subGraph, std::ofstream& i_outputFile, bool i_isSubGraph = false) -> bool
- saveAdditionalStats This save Additional Stats method is designed to save additional statistics related to the execution of the ABC command (a program for synthesizing digital circuits) in a JSON file.
- auto generate(CircuitArgs args = CircuitArgs()) -> bool
- generate This generate method is designed to generate various representations of a digital circuit (for example, Verilog, RTL, Bench) and perform optimizations using the ABC program (if necessary), as well as save digital circuit parameters and additional statistics
- auto generateDOTmmg(CircuitArgs args = CircuitArgs()) -> bool
- generateDOTmmg This generate method is designed to save Mealy or Moore DotReturn class as .dot file
- void setTable(const TruthTable& i_tt)
- setTable This method is designed to set up a truth table for a digital circuit.
- void setPath(const std::string& i_path)
- setPath This method is designed to set the path where the files associated with the digital circuit will be saved.
- void setCircuitName(const std::string& i_circName)
- setCircuitName This method is used to set the name of the digital circuit.
- void setDot_mmg(DotReturn i_dot)
- setDot_mmg This method is used to set the DotReturn d_dot value
- auto getIndexOfWireName(const std::string& i_wireName) -> std::vector<VertexPtr>
- getIndexOfWireName This method is designed to get the index of the vertex in the graph by the name of the wire.
- void setVerticeOperation(int32_t i_vertice, const std::string& i_operation)
- setVerticeOperation This method sets up an operation for a given vertex in the graph.
- auto fromVerilog(const std::string& i_filepath) -> Circuit
- fromVerilog
Function documentation
bool CG_Gen::
graphToVerilog The graph To Verilog method in the Circuit class converts the combinational circuit into code in the Verilog hardware description language and writes it to a file.
| Parameters | |
|---|---|
| i_path | The path to the file where the Verilog code will be written. |
| i_pathExists | A flag indicating whether the path to the file already exists. |
| Returns | true, indicating the successful completion of the operation. */ |
bool CG_Gen::
graphToDOT The graph To DOT method in the Circuit class converts the combinational circuit into code in the DOT hardware description language and writes it to a file.
| Parameters | |
|---|---|
| i_path | The path to the file where the DOT code will be written. |
| i_pathExists | A flag indicating whether the path to the file already exists. |
| Returns | true, indicating the successful completion of the operation. */ |
bool CG_Gen::
generate This generate method is designed to generate various representations of a digital circuit (for example, Verilog, RTL, Bench) and perform optimizations using the ABC program (if necessary), as well as save digital circuit parameters and additional statistics
| Returns | The method returns true if the generation and saving were successful */ |
|---|
void CG_Gen::
setTable This method is designed to set up a truth table for a digital circuit.
| Parameters | |
|---|---|
| i_tt | The Truth Table, which must be installed for the digital circuit. */ |
void CG_Gen::
setPath This method is designed to set the path where the files associated with the digital circuit will be saved.
| Parameters | |
|---|---|
| i_path | A string containing the path to the directory where the digital circuit files will be saved */ |
void CG_Gen::
setCircuitName This method is used to set the name of the digital circuit.
| Parameters | |
|---|---|
| i_circName | A string containing a new name for the digital circuit */ |
std::vector<VertexPtr> CG_Gen::
getIndexOfWireName This method is designed to get the index of the vertex in the graph by the name of the wire.
| Parameters | |
|---|---|
| i_wireName | A string containing the name of the wire for which you want to get the vertex index in the graph of the circuit |
| Returns | An integer value representing the index of a vertex in a graph of a digital circuit. If the vertex with the specified wire name is not found, the method returns -1. */ |
void CG_Gen::
setVerticeOperation This method sets up an operation for a given vertex in the graph.
| Parameters | |
|---|---|
| i_vertice | Index of the vertex to set the operation for |
| i_operation | A string representing the operation to be set for the vertex */ |
Circuit CG_Gen::
fromVerilog
| Parameters | |
|---|---|
| i_filepath | |